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Product Variant Information section
Product Specification Section
Pricing Section

现货数量: 0

在途数量: 0
工厂库存:工厂库存: 0
工厂货期: N/A
起订量: 135
递增量: 135
数量 价格
135 ¥26.5264
270+ ¥26.0499
总价:

¥ 3,581.06

CNY

所有价格均包含16%增值税。

属性
Attributes Table
Memory Density 4Mb
Memory Organization 256 K x 16
Supply Voltage-Nom 3.3V
Access Time-Max 15ns
Temperature Grade Industrial
特性和应用

The AS7C34098A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 262,144 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times of 10/12/15/20 nano-seconds with output enable access times of 4/5/6/7 nano-seconds are ideal for high-performance applications. The chip enable input  permits easy memory expansion with multiple-bank memory systems.

The device is guaranteed not to exceed 28.8mW power consumption in CMOS standby mode. A write cycle is accomplished by asserting write enable and chip enable. Data on the input pins I/O1–I/O16 is written on the rising edge of write enable (write cycle 1) or chip enable (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable or write enable. A read cycle is accomplished by asserting output enable and chip enable, with write enable high.

The chip drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active, output drivers stay in high-impedance mode. The device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and read. The device is available in the JEDEC standard 400-mL, 44-pin SOJ, TSOP 2.

A 4MB 3.3V Fast Alliance product that has a 256K x16 configuration, with industrial temperature range (-40 to +85), TSOP2 package, and 15 nanosecond speed.